c1bdf19061
* Implement ARM32 memory instructions: LDM, LDR, LDRB, LDRD, LDRH, LDRSB, LDRSH, STM, STR, STRB, STRD, STRH (immediate and register + immediate variants), implement CMP (immediate and register shifted by immediate variants) * Rename some opcode classes and flag masks for consistency * Fix a few suboptimal ARM32 codegen issues, only loads should be considered on decoder when checking if Rt == PC, and only NZCV flags should be considered for comparison optimizations * Take into account Rt2 for LDRD instructions aswell when checking if the instruction changes PC * Re-align arm32 instructions on the opcode table
82 lines
No EOL
2.1 KiB
C#
82 lines
No EOL
2.1 KiB
C#
using ChocolArm64.Decoders;
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System.Reflection.Emit;
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using static ChocolArm64.Instructions.InstEmit32Helper;
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namespace ChocolArm64.Instructions
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{
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static partial class InstEmit32
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{
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public static void B(ILEmitterCtx context)
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{
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IOpCode32BImm op = (IOpCode32BImm)context.CurrOp;
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if (context.CurrBlock.Branch != null)
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{
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context.Emit(OpCodes.Br, context.GetLabel(op.Imm));
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}
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else
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{
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context.EmitStoreState();
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context.EmitLdc_I8(op.Imm);
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context.Emit(OpCodes.Ret);
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}
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}
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public static void Bl(ILEmitterCtx context)
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{
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Blx(context, x: false);
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}
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public static void Blx(ILEmitterCtx context)
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{
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Blx(context, x: true);
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}
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public static void Bx(ILEmitterCtx context)
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{
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IOpCode32BReg op = (IOpCode32BReg)context.CurrOp;
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context.EmitStoreState();
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EmitLoadFromRegister(context, op.Rm);
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EmitBxWritePc(context);
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}
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private static void Blx(ILEmitterCtx context, bool x)
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{
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IOpCode32BImm op = (IOpCode32BImm)context.CurrOp;
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uint pc = op.GetPc();
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bool isThumb = IsThumb(context.CurrOp);
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if (!isThumb)
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{
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context.EmitLdc_I(op.GetPc() - 4);
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}
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else
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{
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context.EmitLdc_I(op.GetPc() | 1);
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}
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context.EmitStint(GetBankedRegisterAlias(context.Mode, RegisterAlias.Aarch32Lr));
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context.EmitStoreState();
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//If x is true, then this is a branch with link and exchange.
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//In this case we need to swap the mode between Arm <-> Thumb.
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if (x)
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{
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context.EmitLdc_I4(isThumb ? 0 : 1);
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context.EmitStflg((int)PState.TBit);
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}
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InstEmitFlowHelper.EmitCall(context, op.Imm);
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}
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}
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} |