Ryujinx-git/ARMeilleure/CodeGen/X86
sharmander 40797a1283
Optimization | Modify Add (Integer) Instruction to use LEA instead. (#1971)
* Optimization | Modify Add Instruction to use LEA instead.

Currently, the add instruction requires 4 registers to take place. By using LEA, we can effectively perform the same working using 3 registers, reducing memory spills and improving translation efficiency.

* Fix IsSameOperandDestSrc1 Check for Add

* Use LEA if Dest != SRC1

* Update IsSameOperandDestSrc1 to account for Cases where Dest and Src1 can be same for add

* Fix error in logic

* Typo

* Add paranthesis for clarity

* Compare registers as requested.

* Cleanup if statement, use same comparison method as generateCopy

* Make change as recommended by gdk

* Perform check only when Add calls are made

* use ensure sametype for lea, fix else

* Update comment

* Update version #
2021-02-08 10:49:46 +11:00
..
Assembler.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
CallConvName.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CallingConvention.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
CodeGenCommon.cs Optimize x64 loads and stores using complex addressing modes (#972) 2020-03-10 09:29:34 +11:00
CodeGenContext.cs Add Profiled Persistent Translation Cache. (#769) 2020-06-16 20:28:02 +02:00
CodeGenerator.cs Optimization | Modify Add (Integer) Instruction to use LEA instead. (#1971) 2021-02-08 10:49:46 +11:00
HardwareCapabilities.cs CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650) 2020-11-18 19:35:54 +01:00
IntrinsicInfo.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00
IntrinsicTable.cs CPU (A64): Add Fmaxnmp & Fminnmp Scalar Inst.s, Fast & Slow Paths; with Tests. (#1894) 2021-01-20 09:12:33 +11:00
IntrinsicType.cs Add support for guest Fz (Fpcr) mode through host Ftz and Daz (Mxcsr) modes (fast paths). (#1630) 2020-12-07 10:37:07 +01:00
PreAllocator.cs Optimization | Modify Add (Integer) Instruction to use LEA instead. (#1971) 2021-02-08 10:49:46 +11:00
X86Condition.cs Improve branch operations (#1442) 2020-08-05 08:52:33 +10:00
X86Instruction.cs Fix Vnmls_S fast path (F64: losing input d value). Fix Vnmla_S & Vnmls_S slow paths (using fused inst.s). Fix Vfma_V slow path not using StandardFPSCRValue(). (#1775) 2020-12-17 20:43:41 +01:00
X86Optimizer.cs Fix PPTC on Windows 7. (#1369) 2020-07-09 10:45:24 +10:00
X86Register.cs Add a new JIT compiler for CPU code (#693) 2019-08-08 21:56:22 +03:00