Ryujinx-git/Ryujinx.HLE/HOS/Services/Nv/NvDrvServices/NvGpuAS/NvGpuASIoctl.cs

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Add a new JIT compiler for CPU code (#693) * Start of the ARMeilleure project * Refactoring around the old IRAdapter, now renamed to PreAllocator * Optimize the LowestBitSet method * Add CLZ support and fix CLS implementation * Add missing Equals and GetHashCode overrides on some structs, misc small tweaks * Implement the ByteSwap IR instruction, and some refactoring on the assembler * Implement the DivideUI IR instruction and fix 64-bits IDIV * Correct constant operand type on CSINC * Move division instructions implementation to InstEmitDiv * Fix destination type for the ConditionalSelect IR instruction * Implement UMULH and SMULH, with new IR instructions * Fix some issues with shift instructions * Fix constant types for BFM instructions * Fix up new tests using the new V128 struct * Update tests * Move DIV tests to a separate file * Add support for calls, and some instructions that depends on them * Start adding support for SIMD & FP types, along with some of the related ARM instructions * Fix some typos and the divide instruction with FP operands * Fix wrong method call on Clz_V * Implement ARM FP & SIMD move instructions, Saddlv_V, and misc. fixes * Implement SIMD logical instructions and more misc. fixes * Fix PSRAD x86 instruction encoding, TRN, UABD and UABDL implementations * Implement float conversion instruction, merge in LDj3SNuD fixes, and some other misc. fixes * Implement SIMD shift instruction and fix Dup_V * Add SCVTF and UCVTF (vector, fixed-point) variants to the opcode table * Fix check with tolerance on tester * Implement FP & SIMD comparison instructions, and some fixes * Update FCVT (Scalar) encoding on the table to support the Half-float variants * Support passing V128 structs, some cleanup on the register allocator, merge LDj3SNuD fixes * Use old memory access methods, made a start on SIMD memory insts support, some fixes * Fix float constant passed to functions, save and restore non-volatile XMM registers, other fixes * Fix arguments count with struct return values, other fixes * More instructions * Misc. fixes and integrate LDj3SNuD fixes * Update tests * Add a faster linear scan allocator, unwinding support on windows, and other changes * Update Ryujinx.HLE * Update Ryujinx.Graphics * Fix V128 return pointer passing, RCX is clobbered * Update Ryujinx.Tests * Update ITimeZoneService * Stop using GetFunctionPointer as that can't be called from native code, misc. fixes and tweaks * Use generic GetFunctionPointerForDelegate method and other tweaks * Some refactoring on the code generator, assert on invalid operations and use a separate enum for intrinsics * Remove some unused code on the assembler * Fix REX.W prefix regression on float conversion instructions, add some sort of profiler * Add hardware capability detection * Fix regression on Sha1h and revert Fcm** changes * Add SSE2-only paths on vector extract and insert, some refactoring on the pre-allocator * Fix silly mistake introduced on last commit on CpuId * Generate inline stack probes when the stack allocation is too large * Initial support for the System-V ABI * Support multiple destination operands * Fix SSE2 VectorInsert8 path, and other fixes * Change placement of XMM callee save and restore code to match other compilers * Rename Dest to Destination and Inst to Instruction * Fix a regression related to calls and the V128 type * Add an extra space on comments to match code style * Some refactoring * Fix vector insert FP32 SSE2 path * Port over the ARM32 instructions * Avoid memory protection races on JIT Cache * Another fix on VectorInsert FP32 (thanks to LDj3SNuD * Float operands don't need to use the same register when VEX is supported * Add a new register allocator, higher quality code for hot code (tier up), and other tweaks * Some nits, small improvements on the pre allocator * CpuThreadState is gone * Allow changing CPU emulators with a config entry * Add runtime identifiers on the ARMeilleure project * Allow switching between CPUs through a config entry (pt. 2) * Change win10-x64 to win-x64 on projects * Update the Ryujinx project to use ARMeilleure * Ensure that the selected register is valid on the hybrid allocator * Allow exiting on returns to 0 (should fix test regression) * Remove register assignments for most used variables on the hybrid allocator * Do not use fixed registers as spill temp * Add missing namespace and remove unneeded using * Address PR feedback * Fix types, etc * Enable AssumeStrictAbiCompliance by default * Ensure that Spill and Fill don't load or store any more than necessary
2019-08-08 18:56:22 +00:00
using ARMeilleure.Memory;
using Ryujinx.Common.Logging;
using Ryujinx.Graphics.Memory;
using Ryujinx.HLE.HOS.Kernel.Process;
using Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvMap;
using System;
using System.Collections.Concurrent;
namespace Ryujinx.HLE.HOS.Services.Nv.NvDrvServices.NvGpuAS
{
class NvGpuASIoctl
{
private const int FlagFixedOffset = 1;
private const int FlagRemapSubRange = 0x100;
private static ConcurrentDictionary<KProcess, NvGpuASCtx> _asCtxs;
static NvGpuASIoctl()
{
_asCtxs = new ConcurrentDictionary<KProcess, NvGpuASCtx>();
}
public static int ProcessIoctl(ServiceCtx context, int cmd)
{
switch (cmd & 0xffff)
{
case 0x4101: return BindChannel (context);
case 0x4102: return AllocSpace (context);
case 0x4103: return FreeSpace (context);
case 0x4105: return UnmapBuffer (context);
case 0x4106: return MapBufferEx (context);
case 0x4108: return GetVaRegions(context);
case 0x4109: return InitializeEx(context);
case 0x4114: return Remap (context, cmd);
}
throw new NotImplementedException(cmd.ToString("x8"));
}
private static int BindChannel(ServiceCtx context)
{
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
Logger.PrintStub(LogClass.ServiceNv);
return NvResult.Success;
}
private static int AllocSpace(ServiceCtx context)
{
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
NvGpuASAllocSpace args = MemoryHelper.Read<NvGpuASAllocSpace>(context.Memory, inputPosition);
NvGpuASCtx asCtx = GetASCtx(context);
ulong size = (ulong)args.Pages *
(ulong)args.PageSize;
int result = NvResult.Success;
lock (asCtx)
{
// Note: When the fixed offset flag is not set,
// the Offset field holds the alignment size instead.
if ((args.Flags & FlagFixedOffset) != 0)
{
args.Offset = asCtx.Vmm.ReserveFixed(args.Offset, (long)size);
}
else
{
args.Offset = asCtx.Vmm.Reserve((long)size, args.Offset);
}
if (args.Offset < 0)
{
args.Offset = 0;
Logger.PrintWarning(LogClass.ServiceNv, $"Failed to allocate size {size:x16}!");
result = NvResult.OutOfMemory;
}
else
{
asCtx.AddReservation(args.Offset, (long)size);
}
}
MemoryHelper.Write(context.Memory, outputPosition, args);
return result;
}
private static int FreeSpace(ServiceCtx context)
{
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
NvGpuASAllocSpace args = MemoryHelper.Read<NvGpuASAllocSpace>(context.Memory, inputPosition);
NvGpuASCtx asCtx = GetASCtx(context);
int result = NvResult.Success;
lock (asCtx)
{
ulong size = (ulong)args.Pages *
(ulong)args.PageSize;
if (asCtx.RemoveReservation(args.Offset))
{
asCtx.Vmm.Free(args.Offset, (long)size);
}
else
{
Logger.PrintWarning(LogClass.ServiceNv,
$"Failed to free offset 0x{args.Offset:x16} size 0x{size:x16}!");
result = NvResult.InvalidInput;
}
}
return result;
}
private static int UnmapBuffer(ServiceCtx context)
{
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
NvGpuASUnmapBuffer args = MemoryHelper.Read<NvGpuASUnmapBuffer>(context.Memory, inputPosition);
NvGpuASCtx asCtx = GetASCtx(context);
lock (asCtx)
{
if (asCtx.RemoveMap(args.Offset, out long size))
{
if (size != 0)
{
asCtx.Vmm.Free(args.Offset, size);
}
}
else
{
Logger.PrintWarning(LogClass.ServiceNv, $"Invalid buffer offset {args.Offset:x16}!");
}
}
return NvResult.Success;
}
private static int MapBufferEx(ServiceCtx context)
{
const string mapErrorMsg = "Failed to map fixed buffer with offset 0x{0:x16} and size 0x{1:x16}!";
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
NvGpuASMapBufferEx args = MemoryHelper.Read<NvGpuASMapBufferEx>(context.Memory, inputPosition);
NvGpuASCtx asCtx = GetASCtx(context);
NvMapHandle map = NvMapIoctl.GetNvMapWithFb(context, args.NvMapHandle);
if (map == null)
{
Logger.PrintWarning(LogClass.ServiceNv, $"Invalid NvMap handle 0x{args.NvMapHandle:x8}!");
return NvResult.InvalidInput;
}
long pa;
if ((args.Flags & FlagRemapSubRange) != 0)
{
lock (asCtx)
{
if (asCtx.TryGetMapPhysicalAddress(args.Offset, out pa))
{
long va = args.Offset + args.BufferOffset;
pa += args.BufferOffset;
if (asCtx.Vmm.Map(pa, va, args.MappingSize) < 0)
{
string msg = string.Format(mapErrorMsg, va, args.MappingSize);
Logger.PrintWarning(LogClass.ServiceNv, msg);
return NvResult.InvalidInput;
}
return NvResult.Success;
}
else
{
Logger.PrintWarning(LogClass.ServiceNv, $"Address 0x{args.Offset:x16} not mapped!");
return NvResult.InvalidInput;
}
}
}
pa = map.Address + args.BufferOffset;
long size = args.MappingSize;
if (size == 0)
{
size = (uint)map.Size;
}
int result = NvResult.Success;
lock (asCtx)
{
// Note: When the fixed offset flag is not set,
// the Offset field holds the alignment size instead.
bool vaAllocated = (args.Flags & FlagFixedOffset) == 0;
if (!vaAllocated)
{
if (asCtx.ValidateFixedBuffer(args.Offset, size))
{
args.Offset = asCtx.Vmm.Map(pa, args.Offset, size);
}
else
{
string msg = string.Format(mapErrorMsg, args.Offset, size);
Logger.PrintWarning(LogClass.ServiceNv, msg);
result = NvResult.InvalidInput;
}
}
else
{
args.Offset = asCtx.Vmm.Map(pa, size);
}
if (args.Offset < 0)
{
args.Offset = 0;
Logger.PrintWarning(LogClass.ServiceNv, $"Failed to map size 0x{size:x16}!");
result = NvResult.InvalidInput;
}
else
{
asCtx.AddMap(args.Offset, size, pa, vaAllocated);
}
}
MemoryHelper.Write(context.Memory, outputPosition, args);
return result;
}
private static int GetVaRegions(ServiceCtx context)
{
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
Logger.PrintStub(LogClass.ServiceNv);
return NvResult.Success;
}
private static int InitializeEx(ServiceCtx context)
{
long inputPosition = context.Request.GetBufferType0x21().Position;
long outputPosition = context.Request.GetBufferType0x22().Position;
Logger.PrintStub(LogClass.ServiceNv);
return NvResult.Success;
}
private static int Remap(ServiceCtx context, int cmd)
{
int count = ((cmd >> 16) & 0xff) / 0x14;
long inputPosition = context.Request.GetBufferType0x21().Position;
for (int index = 0; index < count; index++, inputPosition += 0x14)
{
NvGpuASRemap args = MemoryHelper.Read<NvGpuASRemap>(context.Memory, inputPosition);
NvGpuVmm vmm = GetASCtx(context).Vmm;
NvMapHandle map = NvMapIoctl.GetNvMapWithFb(context, args.NvMapHandle);
if (map == null)
{
Logger.PrintWarning(LogClass.ServiceNv, $"Invalid NvMap handle 0x{args.NvMapHandle:x8}!");
return NvResult.InvalidInput;
}
long result = vmm.Map(map.Address, (long)(uint)args.Offset << 16,
(long)(uint)args.Pages << 16);
if (result < 0)
{
Logger.PrintWarning(LogClass.ServiceNv,
$"Page 0x{args.Offset:x16} size 0x{args.Pages:x16} not allocated!");
return NvResult.InvalidInput;
}
}
return NvResult.Success;
}
public static NvGpuASCtx GetASCtx(ServiceCtx context)
{
return _asCtxs.GetOrAdd(context.Process, (key) => new NvGpuASCtx(context));
}
public static void UnloadProcess(KProcess process)
{
_asCtxs.TryRemove(process, out _);
}
}
}