Commit graph

10 commits

Author SHA1 Message Date
LDj3SNuD
a3a5545c05 Implement Ssubw_V and Usubw_V instructions. (#287)
* Update AOpCodeTable.cs

* Update AInstEmitSimdHelper.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdMove.cs

* Update AInstEmitSimdCmp.cs

* Update Instructions.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs
2018-07-18 21:06:28 -03:00
LDj3SNuD
1f2400ed18 Fix EmitHighNarrow(), EmitSaturatingNarrowOp() when Rd == Rn || Rd == Rm (& Part != 0). Optimization of EmitVectorTranspose(), EmitVectorUnzip(), EmitVectorZip() algorithms (reduction of the number of operations and their complexity). Add 12 Tests about Trn1/2, Uzp1/2, Zip1/2 (V) instructions. (#268)
* Update CpuTestSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update Instructions.cs

* Update AInstEmitSimdArithmetic.cs

* Update AInstEmitSimdHelper.cs

* Update AInstEmitSimdMove.cs

* Delete CpuTestSimdMove.cs
2018-07-15 00:53:26 -03:00
gdkchan
e64f484521 Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
* Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions

* Address PR feedback

* Address PR feedback

* Remove another useless temp var

* nit: Alignment

* Replace Context.CurrOp.GetBitsCount() with Op.GetBitsCount()

* Fix encodings and move flag bit test out of the loop
2018-07-14 13:13:02 -03:00
gdkchan
c590201b2a Fix ZIP/UZP/TRN instructions when Rd == Rn || Rd == Rm (#239) 2018-07-09 22:48:28 -03:00
gdkchan
1aa96453ef Add intrinsics support (#121)
* Initial intrinsics support

* Update tests to work with the new Vector128 type and intrinsics

* Drop SSE4.1 requirement

* Fix copy-paste mistake
2018-05-11 20:10:27 -03:00
LDj3SNuD
16660f177e Add TRN1 & TRN2 (vector) instructions. Add 4 simple tests (4S, 8B). (#77)
* Update AOpCodeTable.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs

* Update AInstEmitSimdMove.cs

* Update CpuTestSimdMove.cs
2018-04-12 11:52:00 -03:00
gdkchan
6cb940049d Fix EXT/Widening instruction carrying garbage values on some cases, fix ABD (it shouldn't accumulate, this is another variation of the instruction) 2018-03-30 17:37:31 -03:00
gdkchan
9376a61229 Add SMLAL (vector), fix EXT instruction 2018-03-06 21:36:49 -03:00
gdkchan
fc105218a2 Add EXT, CMTST (vector) and UMULL (vector) instructions 2018-03-02 19:23:38 -03:00
emmauss
7601c05662 Split main project into core,graphics and chocolarm4 subproject (#29) 2018-02-20 17:09:23 -03:00