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Add Flush-to-zero mode (input, output) to FP instructions (slow paths); update FP Tests. Update Naming Conventions for Tests project. (#489)

Browse source 
* Update SoftFloat.cs

* Update SoftFallback.cs

* Update InstEmitSimdShift.cs

* Update InstEmitSimdCvt.cs

* Update InstEmitSimdArithmetic.cs

* Update CryptoHelper.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update CpuThreadState.cs

* Update OpCodeTable.cs

* Add files via upload

* Nit.

* Remove unused using. Nit.

* Remove unused using. FZ update.

* Nit.

* Remove unused using.
This commit is contained in:
LDj3SNuD 2018-11-01 05:22:09 +01:00 committed by gdkchan
parent d527632d1c
commit ecf67bdcef
8 changed files with 499 additions and 295 deletions
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16
Instructions/CryptoHelper.cs
View file

@ -185,10 +185,10 @@ namespace ChocolArm64.Instructions
{ {
int idx = columns << 2; int idx = columns << 2;
byte row0 = inState[idx + 0]; // A, E, I, M: [Row0, Col0-Col3] byte row0 = inState[idx + 0]; // A, E, I, M: [row0, col0-col3]
byte row1 = inState[idx + 1]; // B, F, J, N: [Row1, Col0-Col3] byte row1 = inState[idx + 1]; // B, F, J, N: [row1, col0-col3]
byte row2 = inState[idx + 2]; // C, G, K, O: [Row2, Col0-Col3] byte row2 = inState[idx + 2]; // C, G, K, O: [row2, col0-col3]
byte row3 = inState[idx + 3]; // D, H, L, P: [Row3, Col0-Col3] byte row3 = inState[idx + 3]; // D, H, L, P: [row3, col0-col3]
outState[idx + 0] = (byte)((uint)_gfMul0E[row0] ^ _gfMul0B[row1] ^ _gfMul0D[row2] ^ _gfMul09[row3]); outState[idx + 0] = (byte)((uint)_gfMul0E[row0] ^ _gfMul0B[row1] ^ _gfMul0D[row2] ^ _gfMul09[row3]);
outState[idx + 1] = (byte)((uint)_gfMul09[row0] ^ _gfMul0E[row1] ^ _gfMul0B[row2] ^ _gfMul0D[row3]); outState[idx + 1] = (byte)((uint)_gfMul09[row0] ^ _gfMul0E[row1] ^ _gfMul0B[row2] ^ _gfMul0D[row3]);
@ -246,10 +246,10 @@ namespace ChocolArm64.Instructions
{ {
int idx = columns << 2; int idx = columns << 2;
byte row0 = inState[idx + 0]; // A, E, I, M: [Row0, Col0-Col3] byte row0 = inState[idx + 0]; // A, E, I, M: [row0, col0-col3]
byte row1 = inState[idx + 1]; // B, F, J, N: [Row1, Col0-Col3] byte row1 = inState[idx + 1]; // B, F, J, N: [row1, col0-col3]
byte row2 = inState[idx + 2]; // C, G, K, O: [Row2, Col0-Col3] byte row2 = inState[idx + 2]; // C, G, K, O: [row2, col0-col3]
byte row3 = inState[idx + 3]; // D, H, L, P: [Row3, Col0-Col3] byte row3 = inState[idx + 3]; // D, H, L, P: [row3, col0-col3]
outState[idx + 0] = (byte)((uint)_gfMul02[row0] ^ _gfMul03[row1] ^ row2 ^ row3); outState[idx + 0] = (byte)((uint)_gfMul02[row0] ^ _gfMul03[row1] ^ row2 ^ row3);
outState[idx + 1] = (byte)((uint)row0 ^ _gfMul02[row1] ^ _gfMul03[row2] ^ row3); outState[idx + 1] = (byte)((uint)row0 ^ _gfMul02[row1] ^ _gfMul03[row2] ^ row3);

44
Instructions/InstEmitSimdArithmetic.cs
View file

@ -203,7 +203,7 @@ namespace ChocolArm64.Instructions
public static void Fadd_S(ILEmitterCtx context) public static void Fadd_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.AddScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.AddScalar));
} }
@ -219,7 +219,7 @@ namespace ChocolArm64.Instructions
public static void Fadd_V(ILEmitterCtx context) public static void Fadd_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Add)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Add));
} }
@ -254,7 +254,7 @@ namespace ChocolArm64.Instructions
public static void Fdiv_S(ILEmitterCtx context) public static void Fdiv_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.DivideScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.DivideScalar));
} }
@ -270,7 +270,7 @@ namespace ChocolArm64.Instructions
public static void Fdiv_V(ILEmitterCtx context) public static void Fdiv_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Divide)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Divide));
} }
@ -304,7 +304,7 @@ namespace ChocolArm64.Instructions
EmitVectorZero32_128(context, op.Rd); EmitVectorZero32_128(context, op.Rd);
} }
else /* if (Op.Size == 1) */ else /* if (op.Size == 1) */
{ {
Type[] typesMulAdd = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) }; Type[] typesMulAdd = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
@ -332,7 +332,7 @@ namespace ChocolArm64.Instructions
public static void Fmax_S(ILEmitterCtx context) public static void Fmax_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.MaxScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.MaxScalar));
} }
@ -348,7 +348,7 @@ namespace ChocolArm64.Instructions
public static void Fmax_V(ILEmitterCtx context) public static void Fmax_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Max)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Max));
} }
@ -388,7 +388,7 @@ namespace ChocolArm64.Instructions
public static void Fmin_S(ILEmitterCtx context) public static void Fmin_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.MinScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.MinScalar));
} }
@ -404,7 +404,7 @@ namespace ChocolArm64.Instructions
public static void Fmin_V(ILEmitterCtx context) public static void Fmin_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Min)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Min));
} }
@ -516,7 +516,7 @@ namespace ChocolArm64.Instructions
EmitVectorZero32_128(context, op.Rd); EmitVectorZero32_128(context, op.Rd);
} }
else /* if (Op.Size == 1) */ else /* if (op.Size == 1) */
{ {
Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) }; Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
@ -544,7 +544,7 @@ namespace ChocolArm64.Instructions
public static void Fmul_S(ILEmitterCtx context) public static void Fmul_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.MultiplyScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.MultiplyScalar));
} }
@ -565,7 +565,7 @@ namespace ChocolArm64.Instructions
public static void Fmul_V(ILEmitterCtx context) public static void Fmul_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Multiply)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Multiply));
} }
@ -715,7 +715,7 @@ namespace ChocolArm64.Instructions
EmitVectorZero32_128(context, op.Rd); EmitVectorZero32_128(context, op.Rd);
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
Type[] typesSsv = new Type[] { typeof(double) }; Type[] typesSsv = new Type[] { typeof(double) };
Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) }; Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
@ -772,7 +772,7 @@ namespace ChocolArm64.Instructions
EmitVectorZeroUpper(context, op.Rd); EmitVectorZeroUpper(context, op.Rd);
} }
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
Type[] typesSav = new Type[] { typeof(double) }; Type[] typesSav = new Type[] { typeof(double) };
Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) }; Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
@ -1016,7 +1016,7 @@ namespace ChocolArm64.Instructions
EmitVectorZero32_128(context, op.Rd); EmitVectorZero32_128(context, op.Rd);
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
Type[] typesSsv = new Type[] { typeof(double) }; Type[] typesSsv = new Type[] { typeof(double) };
Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) }; Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
@ -1043,7 +1043,7 @@ namespace ChocolArm64.Instructions
{ {
EmitScalarBinaryOpF(context, () => EmitScalarBinaryOpF(context, () =>
{ {
EmitSoftFloatCall(context, nameof(SoftFloat32.FprSqrtStepFused)); EmitSoftFloatCall(context, nameof(SoftFloat32.FPRSqrtStepFused));
}); });
} }
} }
@ -1081,7 +1081,7 @@ namespace ChocolArm64.Instructions
EmitVectorZeroUpper(context, op.Rd); EmitVectorZeroUpper(context, op.Rd);
} }
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
Type[] typesSav = new Type[] { typeof(double) }; Type[] typesSav = new Type[] { typeof(double) };
Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) }; Type[] typesMulSub = new Type[] { typeof(Vector128<double>), typeof(Vector128<double>) };
@ -1106,7 +1106,7 @@ namespace ChocolArm64.Instructions
{ {
EmitVectorBinaryOpF(context, () => EmitVectorBinaryOpF(context, () =>
{ {
EmitSoftFloatCall(context, nameof(SoftFloat32.FprSqrtStepFused)); EmitSoftFloatCall(context, nameof(SoftFloat32.FPRSqrtStepFused));
}); });
} }
} }
@ -1114,7 +1114,7 @@ namespace ChocolArm64.Instructions
public static void Fsqrt_S(ILEmitterCtx context) public static void Fsqrt_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.SqrtScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.SqrtScalar));
} }
@ -1130,7 +1130,7 @@ namespace ChocolArm64.Instructions
public static void Fsqrt_V(ILEmitterCtx context) public static void Fsqrt_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Sqrt)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Sqrt));
} }
@ -1146,7 +1146,7 @@ namespace ChocolArm64.Instructions
public static void Fsub_S(ILEmitterCtx context) public static void Fsub_S(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitScalarSseOrSse2OpF(context, nameof(Sse.SubtractScalar)); EmitScalarSseOrSse2OpF(context, nameof(Sse.SubtractScalar));
} }
@ -1162,7 +1162,7 @@ namespace ChocolArm64.Instructions
public static void Fsub_V(ILEmitterCtx context) public static void Fsub_V(ILEmitterCtx context)
{ {
if (Optimizations.FastFP && Optimizations.UseSse if (Optimizations.FastFP && Optimizations.UseSse
&& Optimizations.UseSse2) && Optimizations.UseSse2)
{ {
EmitVectorSseOrSse2OpF(context, nameof(Sse.Subtract)); EmitVectorSseOrSse2OpF(context, nameof(Sse.Subtract));
} }

22
Instructions/InstEmitSimdCvt.cs
View file

@ -89,9 +89,9 @@ namespace ChocolArm64.Instructions
context.EmitLdarg(TranslatedSub.StateArgIdx); context.EmitLdarg(TranslatedSub.StateArgIdx);
context.EmitCall(typeof(SoftFloat1632), nameof(SoftFloat1632.FPConvert)); context.EmitCall(typeof(SoftFloat16_32), nameof(SoftFloat16_32.FPConvert));
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
EmitVectorExtractF(context, op.Rn, part + index, 0); EmitVectorExtractF(context, op.Rn, part + index, 0);
@ -139,12 +139,12 @@ namespace ChocolArm64.Instructions
{ {
context.EmitLdarg(TranslatedSub.StateArgIdx); context.EmitLdarg(TranslatedSub.StateArgIdx);
context.EmitCall(typeof(SoftFloat3216), nameof(SoftFloat3216.FPConvert)); context.EmitCall(typeof(SoftFloat32_16), nameof(SoftFloat32_16.FPConvert));
context.Emit(OpCodes.Conv_U8); context.Emit(OpCodes.Conv_U8);
EmitVectorInsertTmp(context, part + index, 1); EmitVectorInsertTmp(context, part + index, 1);
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
context.Emit(OpCodes.Conv_R4); context.Emit(OpCodes.Conv_R4);
@ -354,7 +354,7 @@ namespace ChocolArm64.Instructions
context.Emit(OpCodes.Conv_U8); context.Emit(OpCodes.Conv_U8);
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
VectorHelper.EmitCall(context, signed VectorHelper.EmitCall(context, signed
? nameof(VectorHelper.SatF64ToS64) ? nameof(VectorHelper.SatF64ToS64)
@ -516,7 +516,7 @@ namespace ChocolArm64.Instructions
? nameof(VectorHelper.SatF32ToS32) ? nameof(VectorHelper.SatF32ToS32)
: nameof(VectorHelper.SatF32ToU32)); : nameof(VectorHelper.SatF32ToU32));
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
VectorHelper.EmitCall(context, signed VectorHelper.EmitCall(context, signed
? nameof(VectorHelper.SatF64ToS64) ? nameof(VectorHelper.SatF64ToS64)
@ -565,7 +565,7 @@ namespace ChocolArm64.Instructions
? nameof(VectorHelper.SatF32ToS32) ? nameof(VectorHelper.SatF32ToS32)
: nameof(VectorHelper.SatF32ToU32)); : nameof(VectorHelper.SatF32ToU32));
} }
else /* if (SizeF == 1) */ else /* if (sizeF == 1) */
{ {
VectorHelper.EmitCall(context, signed VectorHelper.EmitCall(context, signed
? nameof(VectorHelper.SatF64ToS64) ? nameof(VectorHelper.SatF64ToS64)
@ -601,7 +601,7 @@ namespace ChocolArm64.Instructions
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToS32)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToS32));
} }
else /* if (Size == 1) */ else /* if (size == 1) */
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToS32)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToS32));
} }
@ -612,7 +612,7 @@ namespace ChocolArm64.Instructions
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToS64)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToS64));
} }
else /* if (Size == 1) */ else /* if (size == 1) */
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToS64)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToS64));
} }
@ -634,7 +634,7 @@ namespace ChocolArm64.Instructions
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToU32)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToU32));
} }
else /* if (Size == 1) */ else /* if (size == 1) */
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToU32)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToU32));
} }
@ -645,7 +645,7 @@ namespace ChocolArm64.Instructions
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToU64)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF32ToU64));
} }
else /* if (Size == 1) */ else /* if (size == 1) */
{ {
VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToU64)); VectorHelper.EmitCall(context, nameof(VectorHelper.SatF64ToU64));
} }

24
Instructions/InstEmitSimdShift.cs
View file

@ -160,7 +160,7 @@ namespace ChocolArm64.Instructions
OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp; OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
if (Optimizations.UseSse2 && op.Size > 0 if (Optimizations.UseSse2 && op.Size > 0
&& op.Size < 3) && op.Size < 3)
{ {
Type[] typesShs = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) }; Type[] typesShs = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) };
Type[] typesAdd = new Type[] { VectorIntTypesPerSizeLog2[op.Size], VectorIntTypesPerSizeLog2[op.Size] }; Type[] typesAdd = new Type[] { VectorIntTypesPerSizeLog2[op.Size], VectorIntTypesPerSizeLog2[op.Size] };
@ -209,7 +209,7 @@ namespace ChocolArm64.Instructions
OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp; OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
if (Optimizations.UseSse2 && op.Size > 0 if (Optimizations.UseSse2 && op.Size > 0
&& op.Size < 3) && op.Size < 3)
{ {
Type[] typesShs = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) }; Type[] typesShs = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) };
Type[] typesAdd = new Type[] { VectorIntTypesPerSizeLog2[op.Size], VectorIntTypesPerSizeLog2[op.Size] }; Type[] typesAdd = new Type[] { VectorIntTypesPerSizeLog2[op.Size], VectorIntTypesPerSizeLog2[op.Size] };
@ -272,7 +272,7 @@ namespace ChocolArm64.Instructions
OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp; OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
if (Optimizations.UseSse2 && op.Size > 0 if (Optimizations.UseSse2 && op.Size > 0
&& op.Size < 3) && op.Size < 3)
{ {
Type[] typesSra = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) }; Type[] typesSra = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) };
@ -304,7 +304,7 @@ namespace ChocolArm64.Instructions
OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp; OpCodeSimdShImm64 op = (OpCodeSimdShImm64)context.CurrOp;
if (Optimizations.UseSse2 && op.Size > 0 if (Optimizations.UseSse2 && op.Size > 0
&& op.Size < 3) && op.Size < 3)
{ {
Type[] typesSra = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) }; Type[] typesSra = new Type[] { VectorIntTypesPerSizeLog2[op.Size], typeof(byte) };
Type[] typesAdd = new Type[] { VectorIntTypesPerSizeLog2[op.Size], VectorIntTypesPerSizeLog2[op.Size] }; Type[] typesAdd = new Type[] { VectorIntTypesPerSizeLog2[op.Size], VectorIntTypesPerSizeLog2[op.Size] };
@ -658,9 +658,9 @@ namespace ChocolArm64.Instructions
context.Emit(signed ? OpCodes.Shr : OpCodes.Shr_Un); context.Emit(signed ? OpCodes.Shr : OpCodes.Shr_Un);
} }
else /* if (Op.Size == 3) */ else /* if (op.Size == 3) */
{ {
EmitShrImm_64(context, signed, round ? roundConst : 0L, shift); EmitShrImm64(context, signed, round ? roundConst : 0L, shift);
} }
if (accumulate) if (accumulate)
@ -795,9 +795,9 @@ namespace ChocolArm64.Instructions
context.Emit(signedSrc ? OpCodes.Shr : OpCodes.Shr_Un); context.Emit(signedSrc ? OpCodes.Shr : OpCodes.Shr_Un);
} }
else /* if (Op.Size == 2 && Round) */ else /* if (op.Size == 2 && round) */
{ {
EmitShrImm_64(context, signedSrc, roundConst, shift); // Shift <= 32 EmitShrImm64(context, signedSrc, roundConst, shift); // shift <= 32
} }
EmitSatQ(context, op.Size, signedSrc, signedDst); EmitSatQ(context, op.Size, signedSrc, signedDst);
@ -814,8 +814,8 @@ namespace ChocolArm64.Instructions
} }
} }
// Dst_64 = (Int(Src_64, Signed) + RoundConst) >> Shift; // dst64 = (Int(src64, signed) + roundConst) >> shift;
private static void EmitShrImm_64( private static void EmitShrImm64(
ILEmitterCtx context, ILEmitterCtx context,
bool signed, bool signed,
long roundConst, long roundConst,
@ -825,8 +825,8 @@ namespace ChocolArm64.Instructions
context.EmitLdc_I4(shift); context.EmitLdc_I4(shift);
SoftFallback.EmitCall(context, signed SoftFallback.EmitCall(context, signed
? nameof(SoftFallback.SignedShrImm_64) ? nameof(SoftFallback.SignedShrImm64)
: nameof(SoftFallback.UnsignedShrImm_64)); : nameof(SoftFallback.UnsignedShrImm64));
} }
private static void EmitVectorShImmWidenBinarySx(ILEmitterCtx context, Action emit, int imm) private static void EmitVectorShImmWidenBinarySx(ILEmitterCtx context, Action emit, int imm)

160
Instructions/SoftFallback.cs
View file

@ -16,8 +16,8 @@ namespace ChocolArm64.Instructions
context.EmitCall(typeof(SoftFallback), mthdName); context.EmitCall(typeof(SoftFallback), mthdName);
} }
#region "ShrImm_64" #region "ShrImm64"
public static long SignedShrImm_64(long value, long roundConst, int shift) public static long SignedShrImm64(long value, long roundConst, int shift)
{ {
if (roundConst == 0L) if (roundConst == 0L)
{ {
@ -25,7 +25,7 @@ namespace ChocolArm64.Instructions
{ {
return value >> shift; return value >> shift;
} }
else /* if (Shift == 64) */ else /* if (shift == 64) */
{ {
if (value < 0L) if (value < 0L)
{ {
@ -37,7 +37,7 @@ namespace ChocolArm64.Instructions
} }
} }
} }
else /* if (RoundConst == 1L << (Shift - 1)) */ else /* if (roundConst == 1L << (shift - 1)) */
{ {
if (shift <= 63) if (shift <= 63)
{ {
@ -52,14 +52,14 @@ namespace ChocolArm64.Instructions
return add >> shift; return add >> shift;
} }
} }
else /* if (Shift == 64) */ else /* if (shift == 64) */
{ {
return 0L; return 0L;
} }
} }
} }
public static ulong UnsignedShrImm_64(ulong value, long roundConst, int shift) public static ulong UnsignedShrImm64(ulong value, long roundConst, int shift)
{ {
if (roundConst == 0L) if (roundConst == 0L)
{ {
@ -67,12 +67,12 @@ namespace ChocolArm64.Instructions
{ {
return value >> shift; return value >> shift;
} }
else /* if (Shift == 64) */ else /* if (shift == 64) */
{ {
return 0UL; return 0UL;
} }
} }
else /* if (RoundConst == 1L << (Shift - 1)) */ else /* if (roundConst == 1L << (shift - 1)) */
{ {
ulong add = value + (ulong)roundConst; ulong add = value + (ulong)roundConst;
@ -82,7 +82,7 @@ namespace ChocolArm64.Instructions
{ {
return (add >> shift) | (0x8000000000000000UL >> (shift - 1)); return (add >> shift) | (0x8000000000000000UL >> (shift - 1));
} }
else /* if (Shift == 64) */ else /* if (shift == 64) */
{ {
return 1UL; return 1UL;
} }
@ -93,7 +93,7 @@ namespace ChocolArm64.Instructions
{ {
return add >> shift; return add >> shift;
} }
else /* if (Shift == 64) */ else /* if (shift == 64) */
{ {
return 0UL; return 0UL;
} }
@ -285,8 +285,8 @@ namespace ChocolArm64.Instructions
{ {
if (op1 <= (ulong)long.MaxValue) if (op1 <= (ulong)long.MaxValue)
{ {
// Op1 from ulong.MinValue to (ulong)long.MaxValue // op1 from ulong.MinValue to (ulong)long.MaxValue
// Op2 from long.MinValue to long.MaxValue // op2 from long.MinValue to long.MaxValue
long add = (long)op1 + op2; long add = (long)op1 + op2;
@ -303,8 +303,8 @@ namespace ChocolArm64.Instructions
} }
else if (op2 >= 0L) else if (op2 >= 0L)
{ {
// Op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue // op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue
// Op2 from (long)ulong.MinValue to long.MaxValue // op2 from (long)ulong.MinValue to long.MaxValue
state.SetFpsrFlag(Fpsr.Qc); state.SetFpsrFlag(Fpsr.Qc);
@ -312,8 +312,8 @@ namespace ChocolArm64.Instructions
} }
else else
{ {
// Op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue // op1 from (ulong)long.MaxValue + 1UL to ulong.MaxValue
// Op2 from long.MinValue to (long)ulong.MinValue - 1L // op2 from long.MinValue to (long)ulong.MinValue - 1L
ulong add = op1 + (ulong)op2; ulong add = op1 + (ulong)op2;
@ -334,8 +334,8 @@ namespace ChocolArm64.Instructions
{ {
if (op1 >= 0L) if (op1 >= 0L)
{ {
// Op1 from (long)ulong.MinValue to long.MaxValue // op1 from (long)ulong.MinValue to long.MaxValue
// Op2 from ulong.MinValue to ulong.MaxValue // op2 from ulong.MinValue to ulong.MaxValue
ulong add = (ulong)op1 + op2; ulong add = (ulong)op1 + op2;
@ -352,15 +352,15 @@ namespace ChocolArm64.Instructions
} }
else if (op2 > (ulong)long.MaxValue) else if (op2 > (ulong)long.MaxValue)
{ {
// Op1 from long.MinValue to (long)ulong.MinValue - 1L // op1 from long.MinValue to (long)ulong.MinValue - 1L
// Op2 from (ulong)long.MaxValue + 1UL to ulong.MaxValue // op2 from (ulong)long.MaxValue + 1UL to ulong.MaxValue
return (ulong)op1 + op2; return (ulong)op1 + op2;
} }
else else
{ {
// Op1 from long.MinValue to (long)ulong.MinValue - 1L // op1 from long.MinValue to (long)ulong.MinValue - 1L
// Op2 from ulong.MinValue to (ulong)long.MaxValue // op2 from ulong.MinValue to (ulong)long.MaxValue
long add = op1 + (long)op2; long add = op1 + (long)op2;
@ -379,7 +379,7 @@ namespace ChocolArm64.Instructions
#endregion #endregion
#region "Count" #region "Count"
public static ulong CountLeadingSigns(ulong value, int size) // Size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.). public static ulong CountLeadingSigns(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
{ {
value ^= value >> 1; value ^= value >> 1;
@ -398,7 +398,7 @@ namespace ChocolArm64.Instructions
private static readonly byte[] ClzNibbleTbl = { 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 }; private static readonly byte[] ClzNibbleTbl = { 4, 3, 2, 2, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 };
public static ulong CountLeadingZeros(ulong value, int size) // Size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.). public static ulong CountLeadingZeros(ulong value, int size) // size is 8, 16, 32 or 64 (SIMD&FP or Base Inst.).
{ {
if (value == 0ul) if (value == 0ul)
{ {
@ -419,7 +419,7 @@ namespace ChocolArm64.Instructions
return (ulong)count; return (ulong)count;
} }
public static ulong CountSetBits8(ulong value) // "Size" is 8 (SIMD&FP Inst.). public static ulong CountSetBits8(ulong value) // "size" is 8 (SIMD&FP Inst.).
{ {
if (value == 0xfful) if (value == 0xfful)
{ {
@ -531,72 +531,72 @@ namespace ChocolArm64.Instructions
#endregion #endregion
#region "Sha1" #region "Sha1"
public static Vector128<float> HashChoose(Vector128<float> hashAbcd, uint hashE, Vector128<float> wk) public static Vector128<float> HashChoose(Vector128<float> hash_abcd, uint hash_e, Vector128<float> wk)
{ {
for (int e = 0; e <= 3; e++) for (int e = 0; e <= 3; e++)
{ {
uint t = ShaChoose((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), uint t = ShaChoose((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)2, 2), (uint)VectorExtractIntZx(hash_abcd, (byte)2, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)3, 2)); (uint)VectorExtractIntZx(hash_abcd, (byte)3, 2));
hashE += Rol((uint)VectorExtractIntZx(hashAbcd, (byte)0, 2), 5) + t; hash_e += Rol((uint)VectorExtractIntZx(hash_abcd, (byte)0, 2), 5) + t;
hashE += (uint)VectorExtractIntZx(wk, (byte)e, 2); hash_e += (uint)VectorExtractIntZx(wk, (byte)e, 2);
t = Rol((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), 30); t = Rol((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2), 30);
hashAbcd = VectorInsertInt((ulong)t, hashAbcd, (byte)1, 2); hash_abcd = VectorInsertInt((ulong)t, hash_abcd, (byte)1, 2);
Rol32_160(ref hashE, ref hashAbcd); Rol32_160(ref hash_e, ref hash_abcd);
} }
return hashAbcd; return hash_abcd;
} }
public static uint FixedRotate(uint hashE) public static uint FixedRotate(uint hash_e)
{ {
return hashE.Rol(30); return hash_e.Rol(30);
} }
public static Vector128<float> HashMajority(Vector128<float> hashAbcd, uint hashE, Vector128<float> wk) public static Vector128<float> HashMajority(Vector128<float> hash_abcd, uint hash_e, Vector128<float> wk)
{ {
for (int e = 0; e <= 3; e++) for (int e = 0; e <= 3; e++)
{ {
uint t = ShaMajority((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), uint t = ShaMajority((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)2, 2), (uint)VectorExtractIntZx(hash_abcd, (byte)2, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)3, 2)); (uint)VectorExtractIntZx(hash_abcd, (byte)3, 2));
hashE += Rol((uint)VectorExtractIntZx(hashAbcd, (byte)0, 2), 5) + t; hash_e += Rol((uint)VectorExtractIntZx(hash_abcd, (byte)0, 2), 5) + t;
hashE += (uint)VectorExtractIntZx(wk, (byte)e, 2); hash_e += (uint)VectorExtractIntZx(wk, (byte)e, 2);
t = Rol((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), 30); t = Rol((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2), 30);
hashAbcd = VectorInsertInt((ulong)t, hashAbcd, (byte)1, 2); hash_abcd = VectorInsertInt((ulong)t, hash_abcd, (byte)1, 2);
Rol32_160(ref hashE, ref hashAbcd); Rol32_160(ref hash_e, ref hash_abcd);
} }
return hashAbcd; return hash_abcd;
} }
public static Vector128<float> HashParity(Vector128<float> hashAbcd, uint hashE, Vector128<float> wk) public static Vector128<float> HashParity(Vector128<float> hash_abcd, uint hash_e, Vector128<float> wk)
{ {
for (int e = 0; e <= 3; e++) for (int e = 0; e <= 3; e++)
{ {
uint t = ShaParity((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), uint t = ShaParity((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)2, 2), (uint)VectorExtractIntZx(hash_abcd, (byte)2, 2),
(uint)VectorExtractIntZx(hashAbcd, (byte)3, 2)); (uint)VectorExtractIntZx(hash_abcd, (byte)3, 2));
hashE += Rol((uint)VectorExtractIntZx(hashAbcd, (byte)0, 2), 5) + t; hash_e += Rol((uint)VectorExtractIntZx(hash_abcd, (byte)0, 2), 5) + t;
hashE += (uint)VectorExtractIntZx(wk, (byte)e, 2); hash_e += (uint)VectorExtractIntZx(wk, (byte)e, 2);
t = Rol((uint)VectorExtractIntZx(hashAbcd, (byte)1, 2), 30); t = Rol((uint)VectorExtractIntZx(hash_abcd, (byte)1, 2), 30);
hashAbcd = VectorInsertInt((ulong)t, hashAbcd, (byte)1, 2); hash_abcd = VectorInsertInt((ulong)t, hash_abcd, (byte)1, 2);
Rol32_160(ref hashE, ref hashAbcd); Rol32_160(ref hash_e, ref hash_abcd);
} }
return hashAbcd; return hash_abcd;
} }
public static Vector128<float> Sha1SchedulePart1(Vector128<float> w03, Vector128<float> w47, Vector128<float> w811) public static Vector128<float> Sha1SchedulePart1(Vector128<float> w0_3, Vector128<float> w4_7, Vector128<float> w8_11)
{ {
if (!Sse.IsSupported) if (!Sse.IsSupported)
{ {
@ -605,16 +605,16 @@ namespace ChocolArm64.Instructions
Vector128<float> result = new Vector128<float>(); Vector128<float> result = new Vector128<float>();
ulong t2 = VectorExtractIntZx(w47, (byte)0, 3); ulong t2 = VectorExtractIntZx(w4_7, (byte)0, 3);
ulong t1 = VectorExtractIntZx(w03, (byte)1, 3); ulong t1 = VectorExtractIntZx(w0_3, (byte)1, 3);
result = VectorInsertInt((ulong)t1, result, (byte)0, 3); result = VectorInsertInt((ulong)t1, result, (byte)0, 3);
result = VectorInsertInt((ulong)t2, result, (byte)1, 3); result = VectorInsertInt((ulong)t2, result, (byte)1, 3);
return Sse.Xor(result, Sse.Xor(w03, w811)); return Sse.Xor(result, Sse.Xor(w0_3, w8_11));
} }
public static Vector128<float> Sha1SchedulePart2(Vector128<float> tw03, Vector128<float> w1215) public static Vector128<float> Sha1SchedulePart2(Vector128<float> tw0_3, Vector128<float> w12_15)
{ {
if (!Sse2.IsSupported) if (!Sse2.IsSupported)
{ {
@ -623,8 +623,8 @@ namespace ChocolArm64.Instructions
Vector128<float> result = new Vector128<float>(); Vector128<float> result = new Vector128<float>();
Vector128<float> t = Sse.Xor(tw03, Sse.StaticCast<uint, float>( Vector128<float> t = Sse.Xor(tw0_3, Sse.StaticCast<uint, float>(
Sse2.ShiftRightLogical128BitLane(Sse.StaticCast<float, uint>(w1215), (byte)4))); Sse2.ShiftRightLogical128BitLane(Sse.StaticCast<float, uint>(w12_15), (byte)4)));
uint tE0 = (uint)VectorExtractIntZx(t, (byte)0, 2); uint tE0 = (uint)VectorExtractIntZx(t, (byte)0, 2);
uint tE1 = (uint)VectorExtractIntZx(t, (byte)1, 2); uint tE1 = (uint)VectorExtractIntZx(t, (byte)1, 2);
@ -676,28 +676,28 @@ namespace ChocolArm64.Instructions
#region "Sha256" #region "Sha256"
[MethodImpl(MethodImplOptions.AggressiveInlining)] [MethodImpl(MethodImplOptions.AggressiveInlining)]
public static Vector128<float> HashLower(Vector128<float> hashAbcd, Vector128<float> hashEfgh, Vector128<float> wk) public static Vector128<float> HashLower(Vector128<float> hash_abcd, Vector128<float> hash_efgh, Vector128<float> wk)
{ {
return Sha256Hash(hashAbcd, hashEfgh, wk, true); return Sha256Hash(hash_abcd, hash_efgh, wk, true);
} }
[MethodImpl(MethodImplOptions.AggressiveInlining)] [MethodImpl(MethodImplOptions.AggressiveInlining)]
public static Vector128<float> HashUpper(Vector128<float> hashEfgh, Vector128<float> hashAbcd, Vector128<float> wk) public static Vector128<float> HashUpper(Vector128<float> hash_efgh, Vector128<float> hash_abcd, Vector128<float> wk)
{ {
return Sha256Hash(hashAbcd, hashEfgh, wk, false); return Sha256Hash(hash_abcd, hash_efgh, wk, false);
} }
public static Vector128<float> Sha256SchedulePart1(Vector128<float> w03, Vector128<float> w47) public static Vector128<float> Sha256SchedulePart1(Vector128<float> w0_3, Vector128<float> w4_7)
{ {
Vector128<float> result = new Vector128<float>(); Vector128<float> result = new Vector128<float>();
for (int e = 0; e <= 3; e++) for (int e = 0; e <= 3; e++)
{ {
uint elt = (uint)VectorExtractIntZx(e <= 2 ? w03 : w47, (byte)(e <= 2 ? e + 1 : 0), 2); uint elt = (uint)VectorExtractIntZx(e <= 2 ? w0_3 : w4_7, (byte)(e <= 2 ? e + 1 : 0), 2);
elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3); elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3);
elt += (uint)VectorExtractIntZx(w03, (byte)e, 2); elt += (uint)VectorExtractIntZx(w0_3, (byte)e, 2);
result = VectorInsertInt((ulong)elt, result, (byte)e, 2); result = VectorInsertInt((ulong)elt, result, (byte)e, 2);
} }
@ -705,11 +705,11 @@ namespace ChocolArm64.Instructions
return result; return result;
} }
public static Vector128<float> Sha256SchedulePart2(Vector128<float> w03, Vector128<float> w811, Vector128<float> w1215) public static Vector128<float> Sha256SchedulePart2(Vector128<float> w0_3, Vector128<float> w8_11, Vector128<float> w12_15)
{ {
Vector128<float> result = new Vector128<float>(); Vector128<float> result = new Vector128<float>();
ulong t1 = VectorExtractIntZx(w1215, (byte)1, 3); ulong t1 = VectorExtractIntZx(w12_15, (byte)1, 3);
for (int e = 0; e <= 1; e++) for (int e = 0; e <= 1; e++)
{ {
@ -717,8 +717,8 @@ namespace ChocolArm64.Instructions
elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10); elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
elt += (uint)VectorExtractIntZx(w03, (byte)e, 2); elt += (uint)VectorExtractIntZx(w0_3, (byte)e, 2);
elt += (uint)VectorExtractIntZx(w811, (byte)(e + 1), 2); elt += (uint)VectorExtractIntZx(w8_11, (byte)(e + 1), 2);
result = VectorInsertInt((ulong)elt, result, (byte)e, 2); result = VectorInsertInt((ulong)elt, result, (byte)e, 2);
} }
@ -731,8 +731,8 @@ namespace ChocolArm64.Instructions
elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10); elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
elt += (uint)VectorExtractIntZx(w03, (byte)e, 2); elt += (uint)VectorExtractIntZx(w0_3, (byte)e, 2);
elt += (uint)VectorExtractIntZx(e == 2 ? w811 : w1215, (byte)(e == 2 ? 3 : 0), 2); elt += (uint)VectorExtractIntZx(e == 2 ? w8_11 : w12_15, (byte)(e == 2 ? 3 : 0), 2);
result = VectorInsertInt((ulong)elt, result, (byte)e, 2); result = VectorInsertInt((ulong)elt, result, (byte)e, 2);
} }
@ -904,13 +904,13 @@ namespace ChocolArm64.Instructions
public static ulong UMulHi128(ulong left, ulong right) public static ulong UMulHi128(ulong left, ulong right)
{ {
ulong lHigh = left >> 32; ulong lHigh = left >> 32;
ulong lLow = left & 0xFFFFFFFF; ulong lLow = left & 0xFFFFFFFF;
ulong rHigh = right >> 32; ulong rHigh = right >> 32;
ulong rLow = right & 0xFFFFFFFF; ulong rLow = right & 0xFFFFFFFF;
ulong z2 = lLow * rLow; ulong z2 = lLow * rLow;
ulong t = lHigh * rLow + (z2 >> 32); ulong t = lHigh * rLow + (z2 >> 32);
ulong z1 = t & 0xFFFFFFFF; ulong z1 = t & 0xFFFFFFFF;
ulong z0 = t >> 32; ulong z0 = t >> 32;
z1 += lLow * rHigh; z1 += lLow * rHigh;

520
Instructions/SoftFloat.cs
View file

File diff suppressed because it is too large Load diff

6
OpCodeTable.cs
View file

@ -544,7 +544,7 @@ namespace ChocolArm64
foreach (var inst in _allInstA64) foreach (var inst in _allInstA64)
{ {
int mask = ToFastLookupIndex(inst.Mask); int mask = ToFastLookupIndex(inst.Mask);
int value = ToFastLookupIndex(inst.Value); int value = ToFastLookupIndex(inst.Value);
for (int i = 0; i < _fastLookupSize; i++) for (int i = 0; i < _fastLookupSize; i++)
@ -665,8 +665,8 @@ namespace ChocolArm64
} }
private static void InsertInst( private static void InsertInst(
int xMask, int xMask,
int value, int value,
Inst inst, Inst inst,
ExecutionMode mode) ExecutionMode mode)
{ {

2
State/CpuThreadState.cs
View file

@ -80,7 +80,7 @@ namespace ChocolArm64.State
} }
} }
public event EventHandler<EventArgs> Interrupt; public event EventHandler<EventArgs> Interrupt;
public event EventHandler<InstExceptionEventArgs> Break; public event EventHandler<InstExceptionEventArgs> Break;
public event EventHandler<InstExceptionEventArgs> SvcCall; public event EventHandler<InstExceptionEventArgs> SvcCall;
public event EventHandler<InstUndefinedEventArgs> Undefined; public event EventHandler<InstUndefinedEventArgs> Undefined;