diff --git a/Instructions/InstEmitSimdMove.cs b/Instructions/InstEmitSimdMove.cs index 841dcfe..647a223 100644 --- a/Instructions/InstEmitSimdMove.cs +++ b/Instructions/InstEmitSimdMove.cs @@ -220,45 +220,37 @@ namespace ChocolArm64.Instructions public static void Fmov_Ftoi(ILEmitterCtx context) { - OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; + OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; - EmitVectorExtractZx(context, op.Rn, 0, 3); - - EmitIntZeroUpperIfNeeded(context); + EmitVectorExtractZx(context, op.Rn, 0, op.Size + 2); context.EmitStintzr(op.Rd); } public static void Fmov_Ftoi1(ILEmitterCtx context) { - OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; + OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; EmitVectorExtractZx(context, op.Rn, 1, 3); - EmitIntZeroUpperIfNeeded(context); - context.EmitStintzr(op.Rd); } public static void Fmov_Itof(ILEmitterCtx context) { - OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; + OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; context.EmitLdintzr(op.Rn); - EmitIntZeroUpperIfNeeded(context); - - EmitScalarSet(context, op.Rd, 3); + EmitScalarSet(context, op.Rd, op.Size + 2); } public static void Fmov_Itof1(ILEmitterCtx context) { - OpCodeSimdCvt64 op = (OpCodeSimdCvt64)context.CurrOp; + OpCodeSimd64 op = (OpCodeSimd64)context.CurrOp; context.EmitLdintzr(op.Rn); - EmitIntZeroUpperIfNeeded(context); - EmitVectorInsert(context, op.Rd, 1, 3); } @@ -280,7 +272,7 @@ namespace ChocolArm64.Instructions EmitScalarSet(context, op.Rd, op.Size + 2); } - public static void Fmov_V(ILEmitterCtx context) + public static void Fmov_Vi(ILEmitterCtx context) { OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp; @@ -347,7 +339,11 @@ namespace ChocolArm64.Instructions EmitVectorExtractSx(context, op.Rn, op.DstIndex, op.Size); - EmitIntZeroUpperIfNeeded(context); + if (op.RegisterSize == RegisterSize.Simd64) + { + context.Emit(OpCodes.Conv_U4); + context.Emit(OpCodes.Conv_U8); + } context.EmitStintzr(op.Rd); } @@ -544,16 +540,6 @@ namespace ChocolArm64.Instructions EmitVectorZip(context, part: 1); } - private static void EmitIntZeroUpperIfNeeded(ILEmitterCtx context) - { - if (context.CurrOp.RegisterSize == RegisterSize.Int32 || - context.CurrOp.RegisterSize == RegisterSize.Simd64) - { - context.Emit(OpCodes.Conv_U4); - context.Emit(OpCodes.Conv_U8); - } - } - private static void EmitMoviMvni(ILEmitterCtx context, bool not) { OpCodeSimdImm64 op = (OpCodeSimdImm64)context.CurrOp; diff --git a/OpCodeTable.cs b/OpCodeTable.cs index 2200fae..74cbdab 100644 --- a/OpCodeTable.cs +++ b/OpCodeTable.cs @@ -233,7 +233,8 @@ namespace ChocolArm64 SetA64("0100111000101000011010xxxxxxxxxx", InstEmit.Aesmc_V, typeof(OpCodeSimd64)); SetA64("0x001110001xxxxx000111xxxxxxxxxx", InstEmit.And_V, typeof(OpCodeSimdReg64)); SetA64("0x001110011xxxxx000111xxxxxxxxxx", InstEmit.Bic_V, typeof(OpCodeSimdReg64)); - SetA64("0x10111100000xxx<0011101<1xxxxx110011xxxxxxxxxx", InstEmit.Fmls_V, typeof(OpCodeSimdReg64)); SetA64("0>0011111>>xxx100001xxxxxxxxxx", InstEmit.Shrn_V, typeof(OpCodeSimdShImm64)); SetA64("0x001110<<1xxxxx001001xxxxxxxxxx", InstEmit.Shsub_V, typeof(OpCodeSimdReg64)); - SetA64("0x1011110>>>>xxx010101xxxxxxxxxx", InstEmit.Sli_V, typeof(OpCodeSimdShImm64)); + SetA64("0x10111100>>>xxx010101xxxxxxxxxx", InstEmit.Sli_V, typeof(OpCodeSimdShImm64)); + SetA64("0110111101xxxxxx010101xxxxxxxxxx", InstEmit.Sli_V, typeof(OpCodeSimdShImm64)); SetA64("0x001110<<1xxxxx011001xxxxxxxxxx", InstEmit.Smax_V, typeof(OpCodeSimdReg64)); SetA64("0x001110<<1xxxxx101001xxxxxxxxxx", InstEmit.Smaxp_V, typeof(OpCodeSimdReg64)); SetA64("000011100x110000101010xxxxxxxxxx", InstEmit.Smaxv_V, typeof(OpCodeSimd64));