diff --git a/Instruction/AInstEmitAlu.cs b/Instruction/AInstEmitAlu.cs index 4fba509..0e546f7 100644 --- a/Instruction/AInstEmitAlu.cs +++ b/Instruction/AInstEmitAlu.cs @@ -218,7 +218,7 @@ namespace ChocolArm64.Instruction EmitSubsCCheck(Context); EmitSubsVCheck(Context); EmitDataStoreS(Context); - } + } public static void Orn(AILEmitterCtx Context) { @@ -244,7 +244,7 @@ namespace ChocolArm64.Instruction nameof(ASoftFallback.ReverseBytes32_32), nameof(ASoftFallback.ReverseBytes32_64)); - public static void EmitFallback32_64(AILEmitterCtx Context, string Name32, string Name64) + private static void EmitFallback32_64(AILEmitterCtx Context, string Name32, string Name64) { AOpCodeAlu Op = (AOpCodeAlu)Context.CurrOp; @@ -320,7 +320,7 @@ namespace ChocolArm64.Instruction EmitDataLoadRn(Context); Context.EmitLdc_I(IntMin); - + Context.Emit(OpCodes.Ceq); EmitDataLoadRm(Context); diff --git a/Instruction/AInstEmitMemory.cs b/Instruction/AInstEmitMemory.cs index af7de3b..67653ed 100644 --- a/Instruction/AInstEmitMemory.cs +++ b/Instruction/AInstEmitMemory.cs @@ -27,7 +27,7 @@ namespace ChocolArm64.Instruction public static void Ldr(AILEmitterCtx Context) => EmitLdr(Context, false); public static void Ldrs(AILEmitterCtx Context) => EmitLdr(Context, true); - public static void EmitLdr(AILEmitterCtx Context, bool Signed) + private static void EmitLdr(AILEmitterCtx Context, bool Signed) { AOpCodeMem Op = (AOpCodeMem)Context.CurrOp; @@ -131,7 +131,7 @@ namespace ChocolArm64.Instruction EmitReadAndStore(Op.Rt2); EmitWBackIfNeeded(Context); - } + } public static void Str(AILEmitterCtx Context) { diff --git a/Instruction/AInstEmitSimdLogical.cs b/Instruction/AInstEmitSimdLogical.cs index 9c897bf..cb6ee4c 100644 --- a/Instruction/AInstEmitSimdLogical.cs +++ b/Instruction/AInstEmitSimdLogical.cs @@ -50,7 +50,7 @@ namespace ChocolArm64.Instruction EmitBitBif(Context, false); } - public static void EmitBitBif(AILEmitterCtx Context, bool NotRm) + private static void EmitBitBif(AILEmitterCtx Context, bool NotRm) { AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;