Add SHA256H, SHA256H2, SHA256SU0, SHA256SU1 instructions; add 4 Tests (closed box). (#352)
* Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update Pseudocode.cs * Update Instructions.cs * Update Bits.cs * Update Integer.cs * Update AOpCodeTable.cs * Create AInstEmitSimdHash.cs * Update ASoftFallback.cs
This commit is contained in:
LDj3SNuD
gdkchan
parent
a7dbe84a68
commit
10e04ace2f
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@ -366,6 +366,10 @@ namespace ChocolArm64
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SetA64("x0011110xx100010000000xxxxxxxxxx", AInstEmit.Scvtf_Gp, typeof(AOpCodeSimdCvt));
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SetA64("010111100x100001110110xxxxxxxxxx", AInstEmit.Scvtf_S, typeof(AOpCodeSimd));
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SetA64("0x0011100x100001110110xxxxxxxxxx", AInstEmit.Scvtf_V, typeof(AOpCodeSimd));
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SetA64("01011110000xxxxx010000xxxxxxxxxx", AInstEmit.Sha256h_V, typeof(AOpCodeSimdReg));
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SetA64("01011110000xxxxx010100xxxxxxxxxx", AInstEmit.Sha256h2_V, typeof(AOpCodeSimdReg));
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SetA64("0101111000101000001010xxxxxxxxxx", AInstEmit.Sha256su0_V, typeof(AOpCodeSimd));
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SetA64("01011110000xxxxx011000xxxxxxxxxx", AInstEmit.Sha256su1_V, typeof(AOpCodeSimdReg));
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SetA64("010111110>>>>xxx010101xxxxxxxxxx", AInstEmit.Shl_S, typeof(AOpCodeSimdShImm));
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SetA64("0x0011110>>>>xxx010101xxxxxxxxxx", AInstEmit.Shl_V, typeof(AOpCodeSimdShImm));
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SetA64("0x101110<<100001001110xxxxxxxxxx", AInstEmit.Shll_V, typeof(AOpCodeSimd));
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61
Instruction/AInstEmitSimdHash.cs
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61
Instruction/AInstEmitSimdHash.cs
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@ -0,0 +1,61 @@
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using ChocolArm64.Decoder;
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using ChocolArm64.Translation;
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namespace ChocolArm64.Instruction
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{
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static partial class AInstEmit
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{
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#region "Sha256"
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public static void Sha256h_V(AILEmitterCtx Context)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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Context.EmitLdvec(Op.Rd);
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Context.EmitLdvec(Op.Rn);
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Context.EmitLdvec(Op.Rm);
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashLower));
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Context.EmitStvec(Op.Rd);
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}
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public static void Sha256h2_V(AILEmitterCtx Context)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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Context.EmitLdvec(Op.Rd);
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Context.EmitLdvec(Op.Rn);
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Context.EmitLdvec(Op.Rm);
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.HashUpper));
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Context.EmitStvec(Op.Rd);
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}
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public static void Sha256su0_V(AILEmitterCtx Context)
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{
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AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
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Context.EmitLdvec(Op.Rd);
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Context.EmitLdvec(Op.Rn);
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.SchedulePart1));
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Context.EmitStvec(Op.Rd);
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}
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public static void Sha256su1_V(AILEmitterCtx Context)
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{
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AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp;
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Context.EmitLdvec(Op.Rd);
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Context.EmitLdvec(Op.Rn);
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Context.EmitLdvec(Op.Rm);
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ASoftFallback.EmitCall(Context, nameof(ASoftFallback.SchedulePart2));
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Context.EmitStvec(Op.Rd);
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}
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#endregion
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}
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}
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@ -1,9 +1,14 @@
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using ChocolArm64.State;
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using ChocolArm64.Translation;
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using System;
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using System.Runtime.CompilerServices;
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using System.Runtime.Intrinsics;
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using System.Runtime.Intrinsics.X86;
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namespace ChocolArm64.Instruction
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{
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using static AVectorHelper;
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static class ASoftFallback
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{
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public static void EmitCall(AILEmitterCtx Context, string MthdName)
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@ -405,6 +410,154 @@ namespace ChocolArm64.Instruction
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}
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#endregion
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#region "Sha256"
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public static Vector128<float> HashLower(Vector128<float> hash_abcd, Vector128<float> hash_efgh, Vector128<float> wk)
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{
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return SHA256hash(hash_abcd, hash_efgh, wk, true);
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}
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[MethodImpl(MethodImplOptions.AggressiveInlining)]
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public static Vector128<float> HashUpper(Vector128<float> hash_efgh, Vector128<float> hash_abcd, Vector128<float> wk)
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{
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return SHA256hash(hash_abcd, hash_efgh, wk, false);
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}
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public static Vector128<float> SchedulePart1(Vector128<float> w0_3, Vector128<float> w4_7)
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{
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Vector128<float> result = new Vector128<float>();
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for (int e = 0; e <= 3; e++)
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{
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uint elt = (uint)VectorExtractIntZx(e <= 2 ? w0_3 : w4_7, (byte)(e <= 2 ? e + 1 : 0), 2);
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elt = elt.Ror(7) ^ elt.Ror(18) ^ elt.Lsr(3);
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elt += (uint)VectorExtractIntZx(w0_3, (byte)e, 2);
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result = VectorInsertInt((ulong)elt, result, (byte)e, 2);
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}
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return result;
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}
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public static Vector128<float> SchedulePart2(Vector128<float> w0_3, Vector128<float> w8_11, Vector128<float> w12_15)
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{
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Vector128<float> result = new Vector128<float>();
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ulong T1 = VectorExtractIntZx(w12_15, (byte)1, 3);
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for (int e = 0; e <= 1; e++)
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{
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uint elt = T1.ULongPart(e);
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elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
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elt += (uint)VectorExtractIntZx(w0_3, (byte)e, 2);
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elt += (uint)VectorExtractIntZx(w8_11, (byte)(e + 1), 2);
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result = VectorInsertInt((ulong)elt, result, (byte)e, 2);
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}
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T1 = VectorExtractIntZx(result, (byte)0, 3);
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for (int e = 2; e <= 3; e++)
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{
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uint elt = T1.ULongPart(e - 2);
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elt = elt.Ror(17) ^ elt.Ror(19) ^ elt.Lsr(10);
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elt += (uint)VectorExtractIntZx(w0_3, (byte)e, 2);
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elt += (uint)VectorExtractIntZx(e == 2 ? w8_11 : w12_15, (byte)(e == 2 ? 3 : 0), 2);
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result = VectorInsertInt((ulong)elt, result, (byte)e, 2);
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}
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return result;
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}
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private static Vector128<float> SHA256hash(Vector128<float> X, Vector128<float> Y, Vector128<float> W, bool part1)
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{
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for (int e = 0; e <= 3; e++)
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{
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uint chs = SHAchoose((uint)VectorExtractIntZx(Y, (byte)0, 2),
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(uint)VectorExtractIntZx(Y, (byte)1, 2),
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(uint)VectorExtractIntZx(Y, (byte)2, 2));
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uint maj = SHAmajority((uint)VectorExtractIntZx(X, (byte)0, 2),
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(uint)VectorExtractIntZx(X, (byte)1, 2),
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(uint)VectorExtractIntZx(X, (byte)2, 2));
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uint t1 = (uint)VectorExtractIntZx(Y, (byte)3, 2);
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t1 += SHAhashSIGMA1((uint)VectorExtractIntZx(Y, (byte)0, 2)) + chs;
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t1 += (uint)VectorExtractIntZx(W, (byte)e, 2);
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uint t2 = t1 + (uint)VectorExtractIntZx(X, (byte)3, 2);
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X = VectorInsertInt((ulong)t2, X, (byte)3, 2);
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t2 = t1 + SHAhashSIGMA0((uint)VectorExtractIntZx(X, (byte)0, 2)) + maj;
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Y = VectorInsertInt((ulong)t2, Y, (byte)3, 2);
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Rol32_256(ref Y, ref X);
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}
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return part1 ? X : Y;
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}
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private static void Rol32_256(ref Vector128<float> Y, ref Vector128<float> X)
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{
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if (!Sse2.IsSupported)
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{
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throw new PlatformNotSupportedException();
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}
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uint yE3 = (uint)VectorExtractIntZx(Y, (byte)3, 2);
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uint xE3 = (uint)VectorExtractIntZx(X, (byte)3, 2);
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Y = Sse.StaticCast<uint, float>(Sse2.ShiftLeftLogical128BitLane(Sse.StaticCast<float, uint>(Y), (byte)4));
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X = Sse.StaticCast<uint, float>(Sse2.ShiftLeftLogical128BitLane(Sse.StaticCast<float, uint>(X), (byte)4));
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Y = VectorInsertInt((ulong)xE3, Y, (byte)0, 2);
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X = VectorInsertInt((ulong)yE3, X, (byte)0, 2);
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}
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private static uint SHAhashSIGMA0(uint x)
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{
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return x.Ror(2) ^ x.Ror(13) ^ x.Ror(22);
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}
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private static uint SHAhashSIGMA1(uint x)
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{
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return x.Ror(6) ^ x.Ror(11) ^ x.Ror(25);
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}
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private static uint SHAmajority(uint x, uint y, uint z)
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{
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return (x & y) | ((x | y) & z);
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}
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private static uint SHAchoose(uint x, uint y, uint z)
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{
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return ((y ^ z) & x) ^ z;
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}
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private static uint Ror(this uint value, int count)
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{
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return (value >> count) | (value << (32 - count));
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}
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private static uint Lsr(this uint value, int count)
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{
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return value >> count;
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}
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private static uint ULongPart(this ulong value, int part)
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{
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return part == 0
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? (uint)(value & 0xFFFFFFFFUL)
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: (uint)(value >> 32);
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}
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#endregion
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#region "Reverse"
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public static uint ReverseBits8(uint Value)
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{
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